Renesas Electronics /R7FA6T1AD /SYSTEM /LVD1CR0

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Interpret as LVD1CR0

7 43 0 0 00 0 0 0 0 0 0 0 0 (0)RIE 0 (0)DFDIS 0 (0)CMPE 0 (00)FSAMP 0 (0)RI 0 (0)RN

DFDIS=0, RN=0, RIE=0, RI=0, CMPE=0, FSAMP=00

Description

Voltage Monitor 1 Circuit Control Register 0

Fields

RIE

Voltage Monitor Interrupt/Reset Enable

0 (0): Disable

1 (1): Enable

DFDIS

Voltage Monitor Digital Filter Disable Mode Select

0 (0): Enable digital filter

1 (1): Disable digital filter

CMPE

Voltage Monitor Circuit Comparison Result Output Enable

0 (0): Disable voltage monitor 1 circuit comparison result output

1 (1): Enable voltage monitor 1 circuit comparison result output.

FSAMP

Sampling Clock Select

0 (00): 1/2 LOCO frequency

1 (01): 1/4 LOCO frequency

2 (10): 1/8 LOCO frequency

3 (11): 1/16 LOCO frequency

RI

Voltage Monitor Circuit Mode Select

0 (0): Voltage Monitor interrupt during Vdet1 passage

1 (1): Voltage Monitor reset enabled when the voltage falls to and below Vdet1

RN

Voltage Monitor Reset Negate Select

0 (0): Negation follows a stabilization time (tLVD) after VCC > Vdet is detected.

1 (1): Negation follows a stabilization time (tLVD) after assertion of the LVD reset.

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